NLT DUAL XEON SINGLE BOARD COMPUTER TECHNICAL INFO, TRENTON TECHNOLOGY SYSTEM HOST BOARD SINGLE BOARD COMPUTER

Transit Case and Rack System Integration

SINGLE BOARD COMPUTERS & ACTIVE / PASSIVE BACKPLANES

NLT (6313-xxx)

NLT Reference Manual - Click Here

6313tdb.gif
Jumpers
The setup of the configuration jumpers on the SBC is described below.

* indicates the default value of each jumper.

NOTE: For two-position jumpers (3-post), "RIGHT" is toward the bracket end of the board; "LEFT" is toward the memory sockets.

JU8 Password Clear
Install for one power-up cycle to reset the password to the default (null password).
Remove for normal operation. *

JU10/JU11 System Flash ROM Operational Modes
The Flash ROM has two programmable sections:  the Boot Block for "flashing" in the BIOS and the Main Block for the executable BIOS and PnP parameters.  Normally only the Main Block is updated when a new BIOS is flashed into the system.

JU10 JU11
All Blocks Write Enabled
Boot Block Write Protected
Block 2-16 Write Protected		 Remove *
Install
Remove		 Remove *
Remove
Install

JU12 CMOS Clear
Install on the LEFT to operate. *

Install on the RIGHT to clear.

NOTE:  To clear the CMOS, power down the system and install the jumper on the RIGHT. Wait for at least two seconds, move the jumper back to the LEFT and turn the power on. When AMIBIOS displays the "CMOS Settings Wrong" message, press F1 to go into the BIOS Setup Utility, where you may reenter your desired BIOS settings, load optimal defaults or load failsafe defaults.
Connectors
NOTE:
Pin 1 on the connectors is indicated by the square pad
on the PCB.

P1 - 10/100/1000Base-T Ethernet Connectors - LAN2
Dual RJ-45 connector, Belfuse #0826-1X1T-23
PIN SIGNAL
1 TRP1+
2 TRP1-
3 TRP2+
4 TRP3+
5 TRP3-
6 TRP2-
7 TRP4+
8 TRP4-

P2 - CPU Fan 2
3 pin single row header, Molex #22-23-2031
PIN SIGNAL
1 Gnd
2 +12V
3 FanTach

P5 - SPEAKER PORT CONNECTOR
4 pin single row header, Amp #640456-4
PIN SIGNAL
1 Speaker Data
2 Key
3 Gnd
4 +5V

P7 - UNIVERSAL SERIAL BUS (USB) CONNECTOR
8 pin dual row header, Molex #702-46-0821
(+5V fused with self-resetting fuses)
PIN SIGNAL
1 +5V - USB2
3 USB2-
5 USB2+
7 Gnd - USB2
PIN SIGNAL
2 +5V - USB3
4 USB3-
6 USB3+
8 Gnd - USB3

P10 - External Reset Connector
2 pin single row header, Amp #640456-2
PIN SIGNAL
1 External Reset In (Low Active)
2 Gnd

P11 - PRIMARY IDE HARD DRIVE CONNECTOR
40 pin dual row header, 3M #30340-6002HB
PIN SIGNAL
1 Reset
3 Data 7
5 Data 6
7 Data 5
9 Data 4
11 Data 3
13 Data 2
15 Data 1
17 Data 0
19 Gnd
21 DRQ 0
23 IOW
25 IOR
27 IORDY
29 DACK 0
31 IRQ 14
33 Add 1
35 Add 0
37 CS 1P
39 IDEACTP
PIN SIGNAL
2 Gnd
4 Data 8
6 Data 9
8 Data 10
10 Data 11
12 Data 12
14 Data 13
16 Data 14
18 Data 15
20 NC
22 Gnd
24 Gnd
26 Gnd
28 SELPDP
30 Gnd
32 NC
34 PCBL DET
36 Add 2
38 CS 3P
40 Gnd

P11A - SECONDARY IDE HARD DRIVE CONNECTOR
40 pin dual row header, 3M #30340-6002HB
PIN SIGNAL
1 Reset
3 Data 7
5 Data 6
7 Data 5
9 Data 4
11 Data 3
13 Data 2
15 Data 1
17 Data 0
19 Gnd
21 DRQ 1
23 IOW
25 IOR
27 IORDY
29 DACK 1
31 IRQ15
33 Add 1
35 Add 0
37 CS 1S
39 IDEACTS
PIN SIGNAL
2 Gnd
4 Data 8
6 Data 9
8 Data 10
10 Data 11
12 Data 12
14 Data 13
16 Data 14
18 Data 15
20 NC
22 Gnd
24 Gnd
26 Gnd
28 SELPDS
30 Gnd
32 NC
34 SCBL DET *
36 Add 2
38 CS 3S
40 Gnd

** For ATA/66 and ATA/100 drives, which should be set for Cable Select for proper speed operation. If other Drives are detected, pin definition is Gnd.

P12 - HARD DRIVE LED CONNECTOR
4 pin single row header, Amp #640456-4
PIN SIGNAL
1 LED +
2 LED -
3 LED -
4 LED +

P15 - VIDEO INTERFACE CONNECTOR
15 pin HD15 connector, Amp #1-1470250-3
PIN SIGNAL
1 Red
2 Green
3 Blue
4 NC
5 Gnd
PIN SIGNAL
6 Gnd
7 Gnd
8 Gnd
9 +5V
10 Gnd
PIN SIGNAL
11 NC
12 EEDI
13 HSYNC
14 VSYNC
15 EECS
P16 - 10/100/1000Base-T Ethernet Connectors - LAN1
Dual RJ-45 connector, Belfuse #0826-1X1T-23
PIN SIGNAL
1 TRP1+
2 TRP1-
3 TRP2+
4 TRP3+
5 TRP3-
6 TRP2-
7 TRP4+
8 TRP4-

P17A - UNIVERSAL SERIAL BUS (USB) CONNECTOR
4 USB vertical connector, Molex #67-329-0000
(+5V fused with self-resetting fuse)
PIN SIGNAL
1 +5V - USB0
2 USB0-
3 USB0+
4 Gnd - USB0

P17B - UNIVERSAL SERIAL BUS (USB) CONNECTOR
4 USB vertical connector, Molex #67-329-0000
(+5V fused with self-resetting fuse)
PIN SIGNAL
1 +5V - USB1
2 USB1-
3 USB1+
4 Gnd - USB1

P19 - CPU FAN 1
3 pin single row header, Molex #22-23-2031
PIN SIGNAL
1 Gnd
2 +12V
3 Fan Tach
P20 - I/O Expansion Mezzanine Card Connector
76 pin controlled impedance connector,
Samtec #MIS-038-01-FD-K
PIN SIGNAL
1 +12V
3 NC
5 NC
7 NC
9 NC
11 NC
13 ICH_SMI#
15 ICH_SIOPME#
17 Gnd
19 L_FRAME#
21 L_DRQ1#
23 L_DRQ0#
25 SERIRQ
27 Gnd
29 PCLK14SIO
31 Gnd
33 SMBDATA_RESUME
35 SMBCLK_RESUME
37 SALRT#_RESUME
39 Gnd
41 EXP_CLK100
43 EXP_CLK100#
45 Gnd
47 C_PE_TXP4
49 C_PE_TXN4
51 Gnd
53 C_PE_TXP3
55 C_PE_TXN3
57 Gnd
59 C_PE_TXP2
61 C_PE_TXN2
63 Gnd
65 C_PE_TXP1
67 C_PE_TXN1
69 Gnd
71 +3.3V
73 +3.3V
75 +3.3V
PIN SIGNAL
2 +5V_STANDBY
4 +5V_STANDBY
6 +5V_DUAL
8 +5V_DUAL
10 NC
12 NC
14 ICH_RCIN#
16 ICH_A20GATE
18 Gnd
20 L_AD3
22 L_AD2
24 L_AD1
26 L_AD0
28 Gnd
30 PCLK33LPC
32 Gnd
34 IPMB_DAT
36 IPMB_CLK
38 IPMB_ALRT#
40 Gnd
42 EXP_RESET#
44 ICH_WAKE#
46 Gnd
48 C_PE_RXP4
50 C_PE_RXN4
52 Gnd
54 C_PE_RXP3
56 C_PE_RXN3
58 Gnd
60 C_PE_RXP2
62 C_PE_RXN2
64 Gnd
66 C_PE_RXP1
68 C_PE_RXN1
70 Gnd
72 +5V
74 +5V
76 +5V

P21 - POWER GOOD LED
2 pin single row header, Amp #640456-2
PIN SIGNAL
1 LED -
2 LED +

P27 - SATA PORT1
7 pin vertical connector, Molex #67491-0031
PIN SIGNAL
1 Gnd
2 TX+
3 TX-
4 Gnd
PIN SIGNAL
5 RX-
6 RX+
7 Gnd

P28 - SATA PORT2
7 pin vertical connector, Molex #67491-0031
PIN SIGNAL
1 Gnd
2 TX+
3 TX-
4 Gnd
PIN SIGNAL
5 RX-
6 RX+
7 Gnd

Memory
The Double Data Rate 2 (DDR2) memory interface supports up to 8GB of memory and can operate as either a single-channel or dual-channel interface. Each of the channels (A and B) terminates in two dual in-line memory module (DIMM) sockets. The System BIOS automatically detects memory type, size and speed.
The SHB uses industry standard 72-bit wide ECC gold finger memory modules in four 240-pin sockets. The DIMMs must be PC2-3200 compliant and have the following features:
  • 240-pin with gold-plated contacts
  • ECC (72-bit) DDR2 memory
  • Dual rank or single rank DIMMs
  • Registered configuration
The following DIMM sizes are supported:
DIMM Size DIMM Type ECC
256 MB Registered 32M x 72
512 MB Registered 64M x 72
1 GB Registered 128M x 72
2 GB Registered 256M x 72
NOTE: With the bracket end of the board to the right, the DIMM sockets are numbered 1B, 1A, 2B and 2A, from top to bottom. All memory modules must have gold contacts.
Populating identical DIMMs in pairs (one each in the A and B channels) results in dual- channel operation. In dual-channel mode, the DIMM pair operates in lockstep, theoretically doubling the memory bandwidth.
When a single DIMM is used, it should be installed in DIMM socket 1B. With this configuration, the interface operates as a single-channel interface with a theoretical memory bandwidth of 3.2GB/s.
Installing two DIMMs which are identical in type, size and rank in DIMM sockets 1B and 1A results in dual-channel operation, which doubles the theoretical memory interface bandwidth to 6.4GB/s. Installing additional DIMMs in sockets 2B and 2A also results in the higher bandwidth. In this case, the DIMMs installed in sockets 2B and 2A must be identical in type, size and rank to each other, but may be different in size from the pair installed in sockets 1B and 1A. If the modules in channel B and channel A (e.g., 1B and 1A) differ in size, the BIOS will use the size of the smallest DIMM.
Installing DIMMs only in sockets 1B and 2B results in single-channel mode, since both DIMMs are in the B channel. If the DIMMs are identical in type and size, they should be populated in sockets 1B and 1A to operate in dual-channel mode.
NOTE: The NLT supports a DDR2-400 memory interface speed. If modules of higher speeds are used, they will clock down to a DDR2-400 memory interface speed.
DDR2 memory modules are available as either single rank or dual rank DIMMs. A rank refers to the 72-bit unit of devices or DRAM chips that make up the PC2-3200 ECC registered 240-pin DDR2 DIMM. Single or dual rank memory modules must be placed in the SHB's DIMM sockets using prescribed population rules to ensure proper memory interface operation and performance.
The following table explains the DDR2 DIMM population rules:
NLT DIMM Socket
1B
(top-most DIMM)		 1A 2B 2A
1 Single Rank Single Rank Empty Empty Empty
1 Dual Rank Dual Rank Empty Empty Empty
2 Single Rank Single Rank Single Rank Empty Empty
1 Dual Rank, 1 Single Rank Dual Rank Single Rank Empty Empty
2 Dual Rank Dual Rank Dual Rank Empty Empty
3 Single Rank Single Rank Single Rank Single Rank Empty
1 Dual Rank, 2 Single Rank Dual Rank Single Rank Single Rank Empty
4 Single Rank Single Rank Single Rank Single Rank Single Rank
* Intel and Pentium are registered trademarks and Xeon is a trademark of Intel Corporation.

All other product names are trademarks of their respective owners.

NLT Product Detail - Click Here
NLT Reference Manual - Click Here
SBC Support Page (drivers, etc.) - Click Here
   
 
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