Home > S6532 Backplane

	FEATURES Compact mechanical design for space-limited applications Graphics-class backplane configuration featuring PCI Express and PCI/PCI-X option card support One SHB Express (PICMG 1.3) System Host Board Slot One x16 PCI Express Slot (electrical and mechanical) Two PCI-X 64-bit/133MHz Slots Four USB 2.0 backplane I/O connections** ATX/EPS right angle power connectors
**Optional USB connectivity provided by PICMG 1.3 System Host Board. Not all SHBs support this capability. Nominal PCB thickness .062" Connector spacing .800" centers Mounting holes .156" diameter All dimensions are inches.
GRAPHICS-CLASS PCI EXPRESS BACKPLANE Chassis Plans' BPG2/2 is a graphics-class backplane that supports a x16 and a x4 PCI Express electrical link from the System Host Board to the backplane's PCI Express slot and PCI Express-to-Dual PCI-X bridge chip. SHB SLOT Accepts an SHB Express (PICMG® 1.3) compliant processor. Chassis Plans' T4L and TML system host boards (SHBs) are examples of compliant PICMG 1.3 processors. Single Board Computer or SBC is another common term used to describe these boards. The BPG2/2 is optimized to fully utilize all available PCI Express links from graphics-class SHBs like Chassis Plans' T4L and TML. PCI EXPRESS SERIAL SLOTS PCIE2 is a x16 PCI Express mechanical slot that is driven by a x16 PCI Express electrical link (A0) from the SHB. The slot supports x16, x8, x4 and x1 PCI Express option cards. The actual speed of a PCI Express connection to an option card slot is determined by the SHB's PCI Express link configuration and the auto-negotiation/link training features of PCI Express. PCI-X PARALLEL BUS SLOTS Two PCI-X slots (slots SLTA1 and SLTB1) on the BPG2/2 are connected to the SHB via a x4 PCI Express link (B0) via a PCI Express-to-PCI-X bridge chip. The bridge chip provides two 64-bit/133MHz PCI-X channels. Slots A1 and B1 support both PCI-X and universal (i.e. 5V/3.3V combo or 3.3V only) PCI option cards. The bridge chip will throttle-down the bus interface speed to match any universal PCI or PCI-X card placed in either slot A1 or B1 that has an interface bus speed less than 133MHz. OPTIONAL USB 2.0 INTERFACES The SHB Express specification defines optional I/O routings from the SHB to the backplane. Chassis Plans' BPG2/2 takes advantage of this new specification feature by providing two USB 2.0 headers capable of providing up to four USB 2.0 backplane ports. The Chassis Plans T4L/TML System Host Board supports two USB ports on the BPG2/2 backplane. A T4L/TML factory installed option enables support for two additional backplane USB ports. Contact Chassis Plans if you are interested in this optional T4L/TML functionality. POWER CONNECTORS The standard BPG2/2 backplane is available with a low-profile, right angle power connector suitable for use with either an ATX or EPS power supply. An optional BPG2/2 is available with straight-in or vertical power connectors. Using straight-in power connectors may interfere with a full-length option card placed in the SLTA1 slot. POWER INDICATORS Surface-mount LEDs provide a convenient visual check for +5V, -5V, +5V AUX,+12V, -12V and +3.3V power connection and status. CAUTION: Never install or remove the SHB or any option card from the BPG2/2 backplane if the +5V AUX LED is GREEN. If the system appears to be off and the+5V AUX LED is GREEN then you need to remove or turn-off the incoming power to the system power supply.	AUXILIARY POWER CONNECTOR The +12V power connector is also a right angle connector on the standard BPG2/2 and provides for routing auxiliary power to the SHB's edge connectors. This new capability of PICMG 1.3 compliant SHBs and backplanes eliminates the need for auxiliary power connections on the system host board. Optional straight-in or vertical connectors are available. PRINTED CIRCUIT LAYERS The backplane is a six-layer, .062" thick board with three separate signal layers: +5V/+12V, +3.3V and ground. Multi-layer backplane construction provides excellent noise immunity. CONNECTING POWER The combination of new power supply technologies, soft-power control signals available via the Advanced Configuration and Power Interface (ACPI) now supported by PICMG 1.3 SHBs and auxiliary power connectors on PICMG 1.3 backplanes that deliver all of the SHBs power to the edge connectors are requiring a different approach to connecting system power. Auxiliary power connectors on the backplane are provided to help improve system Mean Time To Repair (MTTR). All power can be delivered to the SHB via the board's edge connectors. Chassis Plans' PICMG 1.3 SHBs and backplane SHB edge connector slots have ample power pins available to meet the power demands of high-performance, performance-based processor SHBs like the Chassis Plans T4L. The ATX/EPS and +12V power connectors on the BPG2/2 backplane also have an ample number of power pins available to meet these demands. The system designer needs to be aware of the potential power demands of the entire system including the particular SHB to ensure that both the power supply and the power connectors in the cable harness can safely deliver the necessary power to drive the entire system. Specific implementations of ACPI signals, ATX/EPS power supply type and the operating system software will determine the specific connection method for the power supply. For example the use of the Power Good (PWRGD), Power Supply On (PSON#), Five Volt Standby (5VSB) and the Power Button (PWRBT#) ACPI or soft power control signals require the following connection method: ACPI signal usage is optional and may be turned off using the SHBs BIOS and/or signal jumpers. Specific power connections and BIOS parameters will differ according to unique system design requirements. Refer to the Appendix B (Power Connection) and Advanced Setup BIOS sections of the Chassis Plans T4L/TML Technical Reference Manual for more information.
SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE
Chassis Plans ETHERNET USB SATA SHB LAN0 LAN1 USB0 USB1 USB2 USB3 SATA0 SATA1 T4L* - X1 X2 X2 X3 X3 - - TML* - X1 X2 X2 X3 X3 - - * The T4L and TML system host boards will be available in Q1, 2006. 1 The LAN1 port on the backplane will function as a 10/100Base-T Ethernet interface and the operating system may logical recognize the interface as LAN2 2 Requires a T4L/TML factory build option. The operating system may logical recognize these interfaces as USB ports 4 and 5. 3 These two USB interfaces are standard on the T4L and TML SHBs. The operating system may logical recognize these interfaces as USB ports 6 and 7.
MODEL NAME: BPG2/2
MODEL# MODEL NAME DESCRIPTION S6532-007 BPG2/2-CRA Combo ATX/EPS (right angle connector) S6532-008 BPG2/2-CST Combo ATX/EPS (straight/vertical connector, optional)
PCI Express Backplanes Reference Manual (3.2MB) - Click Here