*IOB31 Required to provide PCI Express link to PCIE1 slot
**Optional USB, Ethernet, connectivity provided by PICMG
1.3 System Host Board. Not all SHBs support this capability.
Nominal PCB thickness .062"
Connector spacing .800" centers
Mounting holes .156" diameter
All dimensions are inches.
PCI EXPRESS BACKPLANE
Chassis Plans' BPG4 is a graphics-class backplane that supports one electrical x16 and multiple x1 PCI Express links from the System Host Board to the backplane's PCI Express option card slots.
Accepts an SHB Express (PICMG® 1.3) compliant processor. Chassis Plans' future T4L and TML system host boards (SHBs) are examples of compliant PICMG 1.3 processors. Single Board Computer or SBC is another common term used to describe these boards. The BPG4 is optimized to support a x16 PCI Express link and multiple x1 PCIe links from graphics-class SHBs like Chassis Plans' T4L and TML.
PCI EXPRESS SERIAL SLOTS
PCIE3 is a x16 PCI Express mechanical slot that is driven by a x16 PCI Express link (A0) from the SHB. The slot supports x16, x8, x4 and x1 PCI Express option cards. The SHB drives PCI Express option card slot PCIE2 directly with a x4 PCI Express link (B0) and supports x8, x4 and x1 PCI Express option cards. In order to use the PCIE1 backplane slot a Chassis Plans IOB31 I/O expansion board must be used on the system host board. The IOB31 provides the x1 PCI Express electrical connection to the PCI Express Expansion slot (PCIES) that enables communication between the SHB/IOB31 and the PCI Express option card in backplane slot PCIE1.
The actual speed of a PCI Express connection to an option card slot is determined by the SHB's PCI Express link configuration and the auto-negotiation/link training features of PCI Express.
OPTIONAL USB 2.0 INTERFACES
The SHB Express specification defines optional I/O routings from the SHB to the backplane. Chassis Plans' BPG4 takes advantage of this new specification feature by providing two USB 2.0 headers capable of providing up to four USB 2.0 backplane ports. The Chassis Plans T4L/TML System Host Board supports two USB ports on the BPG4 backplane. A T4L/TML factory installed option enables support for two additional backplane USB ports. Contact Chassis Plans if you are interested in this optional T4L/TML functionality
OPTIONAL ETHERNET INTERFACES
Chassis Plans' BPG4 backplane supports the optional Ethernet routing feature of the SHB Express (PICMG 1.3) specification. Two 10/100/1000Base-T Ethernet RJ-45 connectors are available for use on the backplane. Data communication performance of the backplane's Ethernet interfaces depends on the Ethernet controller hardware and configuration on the system host board. Consult your SHB Ethernet interface implementation method for details. The SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE explains the backplane I/O capabilities supported by Chassis Plans' PICMG 1.3 System Host Boards.
The standard BPG4 backplane is available with a low-profile, right angle power connector suitable for use with either an ATX or EPS power supply. An optional BPG4 is available with straight-in or vertical power connectors. Using straight-in power connectors may interfere with a full-length option card placed in the PCIE3 slot.
Surface-mount LEDs provide a convenient visual check for +5V, -5V, +5V AUX,+12V, -12V and +3.3V power connection and status. CAUTION: Never install or remove the SHB or any option card from the BPG4 backplane if the +5V AUX LED is GREEN. If the system appears to be off and the+5V AUX LED is GREEN then you need to remove or turn-off the incoming power to the system power supply.
The +12V power connector is also a right angle connector on the standard BPG4 and provides for routing auxiliary power to the SHB's edge connectors. This new capability of PICMG 1.3 compliant SHBs and backplanes eliminates the need for auxiliary power connections on the system host board. Optional straight-in or vertical connectors are available.
PRINTED CIRCUIT LAYERS
The backplane is a six-layer, .062" thick board with three separate signal layers: +5V/12V, +3.3V and ground. Multi-layer backplane construction provides excellent noise immunity.
The combination of new power supply technologies, soft-power control signals available via the Advanced Configuration and Power Interface (ACPI) now supported by PICMG 1.3 SHBs and auxiliary power connectors on PICMG 1.3 backplanes that deliver all of the SHBs power to the edge connectors are requiring a different approach to connecting system power.
Auxiliary power connectors on the backplane are provided to help improve system Mean Time To Repair (MTTR). All power can be delivered to the SHB via the board's edge connectors. Chassis Plans' PICMG 1.3 SHBs and backplane SHB edge connector slots have ample power pins available to meet the power demands of high-performance, performance-based processor SHBs like the Chassis Plans T4L. The ATX/EPS and +12V power connectors on the BPG4 backplane also have an ample number of power pins available to meet these demands. The system designer needs to be aware of the potential power demands of the entire system including the particular SHB to ensure that both the power supply and the power connectors in the cable harness can safely deliver the necessary power to drive the entire system.
Specific implementations of ACPI signals, ATX/EPS power supply type and the operating system software will determine the specific connection method for the power supply. For example the use of the Power Good (PWRGD), Power Supply On (PSON#), Five Volt Standby (5VSB) and the Power Button (PWRBT#) ACPI or soft power control signals require the following connection method:
ACPI signal usage is optional and may be turned off using the SHBs BIOS and/or signal jumpers. Specific power connections and BIOS parameters will differ according to unique system design requirements. Refer to the Appendix B (Power Connection) and Advanced Setup BIOS sections of the Chassis Plans T4L/TML Technical Reference Manual for more information.
SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE
1 The LAN1 port on the backplane will function as a 10/100Base-T Ethernet interface and the operating system may logical recognize the interface as LAN2
2 Requires a T4L/TML factory build option. The operating system may logical recognize these interfaces as USB ports 4 and 5.
3 These two USB interfaces are standard on the T4L and TML SHBs. The operating system may logical recognize these interfaces as USB ports 6 and 7.
MODEL NAME: BPG4
PCI Express Backplanes Reference Manual (3.2MB) - Click Here