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FEATURES
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| SERVER-CLASS PCI EXPRESS™ BACKPLANE Chassis Plans' BPX6719 is a server-class backplane. A server-class backplane enables the maximum number of high-bandwidth, i.e, x4 or greater, PCI Express™ links from the System Host Board to the backplane’s PCIe option card slots. SHB SLOT Accepts an SHB Express™ (PICMG® 1.3) compliant processor. Chassis Plans' NLT/NLI, SLT/SLI and MCX-series system host boards (SHBs) are examples of compliant PICMG 1.3 processors. The BPX6719 is optimized to fully utilize all available PCI Express links from server-class SHBs. PCI EXPRESS SERIAL SLOTS Two PCI Express slots (slots PCIe1 and PCIe2) on the BPX6719 are x8 slots that mechanically support x8, x4 and x1 PCI Express cards. PCI Express option card slot PCIe2 is driven directly by the SHB via a x8 PCI Express link (A2) from the server-class SHB and PCIe1 uses the x4 PCIe link provided by the SHB via a Chassis Plans IOB31 I/O expansion board. The IOB31 is attached to the SHB and connects to the backplane’s PCIeS slot. PCIe3 is a x16 PCI Express mechanical slot that is driven by a x8 PCI Express link (A0) from the SHB. This slot mechanically supports x16, x8, x4 and x1 PCI Express option cards. The actual speed of a PCI Express connection to an option card slot is determined by the SHB’s PCI Express link configuration and the auto-negotiation/link training features of PCI Express. PCI-X/PCI PARALLEL BUS SLOTS Three PCI-X slots (SLTA1, SLTB1 and SLTB2) on the BPX6719 are connected to the SHB via a x4 PCI Express link (B0) via a PCI Express-to-PCI-X bridge chip. The bridge chip supports SLTA1 with a 64-bit/133MHz PCI-X interface and SLTB1 and SLTB2 with a 64-bit/100MHz PCI-X interface. These slots support PCI-X and universal PCI option cards, (i.e. 5V/3.3V combo or 3.3V only). The bridge chip will throttle-down the bus interface speed to match any card that has a speed capability less than the supported bus interface speed of a specific PCI-X backplane slot. OPTIONAL USB 2.0 INTERFACES The SHB Express specification defines optional I/O routings from the SHB to the backplane. Chassis Plans' BPX6719 takes advantage of this new specification feature by providing two USB 2.0 headers capable of providing up to four USB 2.0 backplane ports. OPTIONAL ETHERNET INTERFACE Chassis Plans' BPX6719 backplane supports the optional Ethernet routing feature of the SHB Express (PICMG 1.3) specification. One 10/100/1000Base-T Ethernet RJ-45 connector is available for use on the backplane. The SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE explains the backplane I/O capabilities supported by Chassis Plans' PICMG 1.3 System Host Boards. POWER CONNECTORS The standard BPX6719 backplane is available with a low-profile right-angle power connector suitable for use with either an ATX or EPS power supply. An optional BPX6719 is available with straight-in or vertical power connectors. Using straight-in power connectors may interfere with a full-length option card placed in the SLTB1 slot. |
POWER INDICATORS ACPI signal usage is optional and may be turned off using the SHB’s BIOS and/or signal jumpers. Specific power connections and BIOS parameters will differ depending on unique system design requirements. Refer to the Appendix B (Power Connection) and Advanced Setup BIOS sections found in the Technical Reference Manual for your specific Chassis Plans system host board for more information. |
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SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE |
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2 LAN2 is a 10/100/1000BASE-T Ethernet interface when using a MCX-series SHB Note: The letter X indicates an interface connection routed to SHB edge connector C for use on the backplane |
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MODEL NAME: BPX6719 |
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PCI Express Backplanes Reference Manual (3.2MB) - Click Here |
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