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> S6731 SBC Technical Info
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Configuration Jumpers
The setup of the configuration jumpers on the SHB is
described below.
* indicates the default value of each jumper.
NOTE: For two-position
jumpers (3-post), "RIGHT" is toward the bracket end
of the board; "LEFT" is toward the processor.
| Jumper |
Description |
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JU8
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Password Clear
Install for one power-up cycle to reset the password
to the default (null password).
Remove for normal operation. * |
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JU10/11
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System Flash
ROM Operational Modes The Flash ROM has
two programmable sections: the Boot Block for "flashing"
in the BIOS and the Main Block for the executable
BIOS and PnP parameters. Normally only the Main
Block is updated when a new BIOS is flashed into
the system. |
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JU10 |
JU11 |
All Blocks Write Enabled
Boot Block Write Protected
Block 2-16 Write Protected |
Remove *
Install
Remove |
Remove *
Remove
Install |
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JU12
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CMOS Clear
Install on the RIGHT to clear.
Install on the LEFT to operate. *
NOTE: To clear the CMOS,
power down the system and install the jumper on
the RIGHT. Wait for at least two seconds, move the
jumper back to the LEFT and turn the power on. When
AMIBIOS displays the "CMOS Settings Wrong" message,
press F1 to go into the BIOS Setup Utility, where
you may reenter your desired BIOS settings, load
optimal defaults or load failsafe defaults. |
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P1 Ethernet LEDs
I/O bracket connector P1 consists of two RJ-45 network
connectors for Ethernet LAN1 and LAN2. Each LAN
interface connector has two LEDs that indicate activity
status and Ethernet connection speed. Listed below
are the possible LED conditions and status indications
for LAN1 and LAN2:
|
| LED/Connector |
Description |
| Activity LED |
Green LED which indicates network activity. This
is the upper LED on the LAN connector (i.e., toward
the memory sockets). |
| Off |
No current network transmit or receive activity
|
| On (flashing) |
Indicates network transmit or receive activity.
|
| Speed LED |
Green LED which identifies the connection speed.
This is the lower LED on the LAN connector (i.e.,
toward the edge connectors). |
| Off |
Indicates a valid link at 1000-Mb/s |
| On |
Indicates a valid link at 100-Mb/s. |
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| RJ-45 Network Connectors |
The RJ-45 network connector requires a Connectors
category 5 (CAT5) unshielded twisted-pair (UTP)
2-pair cable for a 100-Mb/s network connection or
a category 3 (CAT3) or higher UTP 2-pair cable for
a 10-Mb/s network connection. A category 5e (CAT5e)
or higher UTP 2-pair cable is recommended for a
1000-Mb/s (Gigabit) network connection. |
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Backplane LAN
LED
The backplane LAN LED (LED11) is a green LED located
near PCI Express edge connector C and directly above
the lower left anchor of the MCH heat sink. This
LED indicates the status of communication between
the SHB and the backplane as shown below: |
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| LED Status |
Description |
| Off |
Indicates the LAN is inactive and link communications
have not been established. |
| On (flashing) |
Indicates that data is being transferred between
the SHB and the backplane. |
| On (solid) |
Indicates the LAN has a valid link and is ready
for data transfers. |
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Power On LED
The Power On LED (LED11) is a red LED located at
the center bottom of the SHB and is used to indicate
the presence of the VCC voltage needed by the TQ9's
DDR memory. When the LED is on this indicates that
VCC_DDR is present and at an acceptable level to
drive the SHBs memory DIMMs. |
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POST Code LEDs
As the POST (Power On Self Test) routines are performed
during boot-up, test codes are displayed on Port
80 POST code LEDs 1 through 8, which are located
in the center of the board to the right of the processor
and are numbered from top (1) to bottom (8). Refer
to the board layout diagram for the exact location
of the POST code LEDs.
These POST codes may be helpful as a diagnostic
tool. Specific error codes are listed in Appendix
A - BIOS Messages section of the TQ9 Technical Reference
Manual, along with a chart to interpret the LEDs
into hexadecimal format. |
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CPU Throttling
LED
The CPU throttling LED (LED9), which is located
in the upper left corner of the TQ9, indicates the
status of CPU thermal shutdown, as shown below:
|
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| LED Status |
Description |
| Off |
Indicates the CPU is operating within acceptable
thermal levels. |
| On (flashing) |
Indicates the CPU is throttling down to a lower
operating speed due to rising CPU temperature. |
| On (solid) |
Indicates the CPU has reached the thermal shutdown
threshold limit. The SHB is still operating, but
a thermal shutdown may soon occur. |
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| NOTE: When
a thermal shutdown occurs, the LED will stay on
in systems using non- ATX/EPS power supplies. The
CPU will cease functioning, but power will still
be applied to the SHB. In systems with ATX/EPS power
supplies, the LED will turn off when a thermal shutdown
occurs because system power is removed via the ACPI
soft control power signal S5. In this case, all
SHB LEDs will turn off; however, stand-by power
will still be present. |
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NOTE:
Pin 1 on the connectors is indicated by the square pad
on the PCB.
P1 - 10/100/1000Base-T Ethernet Connectors
- LAN1/LAN2
Dual RJ-45 connector, Pulse #JG0-0024NL
Each individual RJ-45 connector is defined as follows:
| PIN |
SIGNAL |
| 1A |
L2_MDI0n |
| 2A |
L2_MDI0p |
| 3A |
L2_MDI1n |
| 4A |
L2_MDI1p |
| 5A |
L2_MDI2n |
| 6A |
L2_MDI2p |
| 7A |
L2_MDI3n |
| 8A |
L2_MDI3p |
| 9A |
VCC_1.8V |
| 10A |
GND_A |
|
| PIN |
SIGNAL |
| 1B |
L1_MDI0n |
| 2B |
L1_MDI0p |
| 3B |
L1_MDI1n |
| 4B |
L1_MDI1p |
| 5B |
L1_MDI2n |
| 6B |
L1_MDI2p |
| 7B |
L1_MDI3n |
| 8B |
L1_MDI3p |
| 9B |
VCC_1.8V |
| 10B |
GND_B |
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P5 - SPEAKER PORT CONNECTOR
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
Speaker Data |
| 2 |
Key |
| 3 |
Gnd |
| 4 |
+5V |
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P9 - Analog Audio Connector
10 pin dual row header, Amp #1761610-3
| PIN |
SIGNAL |
| 1 |
NC |
| 3 |
Gnd |
| 5 |
Mic-L |
| 7 |
Gnd |
| 9 |
HP_OUT_L |
|
| PIN |
SIGNAL |
| 2 |
NC |
| 4 |
Gnd |
| 6 |
Mic-R |
| 8 |
Gnd |
| 10 |
HP_OUT_R |
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P10 - External Reset Connector
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
Reset In |
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P12 - Hard Drive LED Connector
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
LED + |
| 2 |
LED - |
| 3 |
LED - |
| 4 |
LED + |
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P15 - Video Interface Connector
15 pin HD15 connector, Kycon K31X-E15S-N
| PIN |
SIGNAL |
| 1 |
Red |
| 2 |
Green |
| 3 |
Blue |
| 4 |
NC |
| 5 |
GND |
|
| PIN |
SIGNAL |
| 6 |
Gnd |
| 7 |
Gnd |
| 8 |
Gnd |
| 9 |
+5V |
| 8 |
Gnd |
|
| PIN |
SIGNAL |
| 11 |
NC |
| 12 |
EEDI |
| 13 |
HSYNC |
| 14 |
VSYNC |
| 14 |
EECS |
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P17 - Universal Serial Bus (USB)
Connector
8 pin dual row header, Molex #702-46-0801
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB2 |
| 3 |
USB2- |
| 5 |
USB2+ |
| 7 |
Gnd - USB2 |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB3 |
| 4 |
USB3- |
| 6 |
USB3+ |
| 8 |
Gnd - USB3 |
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P17A - UNIVERSAL SERIAL BUS (USB)
CONNECTOR
USB vertical connector, Molex #47500-0001
(+5V fused with self-resetting fuse)
| PIN |
SIGNAL |
| 1 |
+5V - USB0 |
| 2 |
USB0- |
| 3 |
USB0+ |
| 4 |
Gnd - USB0 |
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P17B - UNIVERSAL SERIAL BUS (USB)
CONNECTOR
USB vertical connector, Molex #47500-0001
(+5V fused with self-resetting fuse)
| PIN |
SIGNAL |
| 1 |
+5V - USB1 |
| 2 |
USB1- |
| 3 |
USB1+ |
| 4 |
Gnd - USB1 |
|
P17C - UNIVERSAL SERIAL BUS (USB)
CONNECTOR
8 pin dual row header, Molex #702-46-0801
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB4 |
| 3 |
USB4- |
| 5 |
USB4+ |
| 7 |
Gnd - USB4 |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB5 |
| 4 |
USB5- |
| 6 |
USB5+ |
| 8 |
Gnd - USB5 |
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P17D - UNIVERSAL SERIAL BUS (USB)
CONNECTOR
8 pin dual row header, Molex #702-46-0801
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB6 |
| 3 |
USB6- |
| 5 |
USB6+ |
| 7 |
Gnd - USB6 |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB7 |
| 4 |
USB7- |
| 6 |
USB7+ |
| 8 |
Gnd - USB7 |
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P18 - SYSTEM HARDWARE MONITOR CONNECTOR
4 pin single row header, AMP #640456-4
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
GPO (General Purpose Output) |
| 3 |
CI (Chassis Intrusion Input) |
| 4 |
OVT (Over Temperature) |
|
|
P19
- CPU FAN
3 pin single row header, Molex #22-23-2031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
+12V |
| 3 |
Fan Tach |
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P20 - I/O Expansion Mezzanine Card
Connector
76 pin controlled impedance connector,
Samtec #MIS-038-01-FD-K
| PIN |
SIGNAL |
| 1 |
+12V |
| 3 |
NC |
| 5 |
NC |
| 7 |
NC |
| 9 |
NC |
| 11 |
NC |
| 13 |
ICH_SMI# |
| 15 |
ICH_SIOPME# |
| 17 |
Gnd |
| 19 |
L_FRAME# |
| 21 |
L_DRQ1# |
| 23 |
L_DRQ0# |
| 25 |
SERIRQ |
| 27 |
Gnd |
| 29 |
PCLK14SIO |
| 31 |
Gnd |
| 33 |
SMBDATA_RESUME |
| 35 |
SMBCLK_RESUME |
| 37 |
SALRT#_RESUME |
| 39 |
Gnd |
| 41 |
EXP_CLK100 |
| 43 |
EXP_CLK100# |
| 45 |
Gnd |
| 47 |
C_PE_TXP5 |
| 49 |
C_PE_TXN5 |
| 51 |
Gnd |
| 53 |
NC |
| 55 |
NC |
| 57 |
Gnd |
| 59 |
NC |
| 61 |
NC |
| 63 |
Gnd |
| 65 |
NC |
| 67 |
NC |
| 69 |
Gnd |
| 71 |
+3.3V |
| 73 |
+3.3V |
| 75 |
+3.3V |
|
| PIN |
SIGNAL |
| 2 |
+5V_STANDBY |
| 4 |
+5V_STANDBY |
| 6 |
+5V_DUAL |
| 8 |
+5V_DUAL |
| 10 |
NC |
| 12 |
NC |
| 14 |
ICH_RCIN# |
| 16 |
ICH_A20GATE |
| 18 |
Gnd |
| 20 |
L_AD3 |
| 22 |
L_AD2 |
| 24 |
L_AD1 |
| 26 |
L_AD0 |
| 28 |
Gnd |
| 30 |
PCLK33LPC |
| 32 |
Gnd |
| 34 |
IPMB_DAT |
| 36 |
IPMB_CLK |
| 38 |
IPMB_ALRT# |
| 40 |
Gnd |
| 42 |
EXP_RESET# |
| 44 |
ICH_WAKE# |
| 46 |
Gnd |
| 48 |
C_PE_RXP5 |
| 50 |
C_PE_RXN5 |
| 52 |
Gnd |
| 54 |
NC |
| 56 |
NC |
| 58 |
Gnd |
| 60 |
NC |
| 62 |
NC |
| 64 |
Gnd |
| 66 |
NC |
| 68 |
NC |
| 70 |
Gnd |
| 72 |
+5V |
| 74 |
+5V |
| 76 |
+5V |
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P21 - POWER GOOD LED
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
LED - |
| 2 |
LED + |
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P27 - SATA PORT1
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
|
P28 - SATA PORT2
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
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P31 - SATA PORT3
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
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P32 - SATA PORT4
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
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P40 - Audio Codec
16-pin vertical connector, 3M #N2516-6002RB
| PIN |
SIGNAL |
| 1 |
HDA0_BCLK |
| 3 |
HDA0_RST# |
| 5 |
HDA0_SYNC |
| 7 |
HDA0_SDOUT |
| 9 |
HDA0_SDIN0 |
| 11 |
NC |
| 13 |
NC |
| 15 |
NC |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
3.3V |
| 6 |
Gnd |
| 8 |
3.3V |
| 10 |
12V |
| 12 |
NC |
| 14 |
3.3V |
| 16 |
Gnd |
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The Double Data Rate (DDR2) memory interface is a dual-channel
interface which supports up to 8GB of memory and supports
memory transfer rates of 800MHz. Each of the channels
(A and B) terminates with two dual in-line memory module
(DIMM) socket. The System BIOS automatically detects
memory type, size and speed.
The SHB uses industry standard gold finger memory modules,
which must be PC2-6400 compliant and have the following
features:
- Gold-plated contacts
- Non-ECC (64-bit) DDR2 memory
- Unbuffered configuration
The following DIMM sizes are supported:
| FSB |
DIMM Type |
Width |
Component Density |
| 1333 |
PC2-6400 |
x8, x16 |
256MB, 512MB, 1GB, 2GB |
| 1066 |
PC2-6400 |
x8, x16 |
256MB, 512MB, 1GB, 2GB |
| 800 |
PC2-6400 |
x8, x16 |
256MB, 512MB, 1GB, 2GB |
| 667 |
PC2-6400 |
x8, x16 |
256MB, 512MB, 1GB, 2GB |
NOTE 1: To maximize system
performance and reliability, Chassis Plans recommends using
DIMMs that support the Serial Presence Detect (SPD)
data structure. All memory modules must have gold contacts.
NOTE 2: Double-sided DIMMS
with a x16 organization are not supported.
NOTE 3: To minimize memory
channel errors regardless of the type of memory module
used; Chassis Plans recommends memory DIMMs with a memory
clock cycle specification of ten (10).
Chassis Plans' TQ9 supports Interleaved and Asymmetric
memory operations. The mode of memory operation is determined
by how the DIMMs are populated. Listed below are descriptions
of the Interleaved and Asymmetric memory operations.
Interleaved Mode - This is the mode of operation
that enables the highest memory interface speed and
bandwidth throughput capability. Often times this mode
of operation is referred to as "dual-channel mode".
Interleaved mode occurs when using two or four DIMM
modules with equal memory capacities. The DIMM technology
and device width can vary but the installed memory capacity
for each channel must be equal. If different speed DIMMs
are used in each channel then the slowest DIMM will
determine the memory interface speed.
Asymmetric Mode - A memory module can be installed
in only one DIMM socket. If only one DIMM module is
used, it must be populated in either DIMM socket BKA1
or BKB1. From a system operational standpoint, asymmetric
mode functions as a "single-channel" memory interface.
Asymmetric mode occurs when using either a single DIMM
module or multiple DIMMs with unequal memory capacities.
The DIMM technology and device width can vary in each
channel and if different speed DIMMs are used in each
channel then the slowest DIMM will determine the memory
interface speed.
The TQ9’s memory interface operates at maximum
bandwidth with two DIMMs of the same size installed
in DIMM Socket BKA1 and BKB1, but the DIMMs may differ
in technology (component density) and/or device width.
Populating identical DIMMs in all four DIMM sockets
will also achieve maximum memory bandwidth operation.
For example, when using a single PC2-6400 DIMM, the
peak memory interface bandwidth is 6.4GB/s, and placing
a PC2-6400 DIMM in each socket of the two memory channels
produces a TQ9 theoretical peak memory bandwidth of
12.8GB/s.
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TML Product Detail - Click
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Here
SBC Support Page (drivers, etc.)
- Click Here
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